The present invention relates to a gate circuit which employs complementary insulated gate field-effect transistors, and more particularly to such a gate circuit having a delay function.
In the field of digital equipment, gate circuits are widely used. Such a gate circuit can be used for instance to temporarily store information from the time when a first clock pulse is applied to the circuit until the next clock pulse is applied to the circuit. Such a gate circuit is generally called a delay type flip-flop or a D-type flip-flop and is widely used as a basic portion of digital circuits such as shift registers and counters.
Conventional gate circuits of this type employing insulated gate field effect transistors (IGFET's) can be broadly classified into two kinds. One kind utilizes single conductivity type IGFET's and another kind utilizes IGFET's of two complementary conductivity types. Use of circuits having complementary conductivity type IGFET's is greatly advantageous as compared to circuits having single conductivity type IGFET's in that the range of operating voltage of such circuits is widened and the power dissipation is minimized. On the other hand, circuits employing IGFET's of two conductivity types have the disadvantage that two clock signals of different polarities are required for control of the circuit.
An object of the present invention is to provide a gate circuit employing complementary IGFET pairs and having a delay function which can be controlled by a single clock signal.